As circuits shrink, thermal performance becomes very important. We compare the LFPAK88’s thermal performance with D²PAK and discover the LFPAK88 acquits itself very well.
For designers, one of the most desirable attributes of Nexperia’s LFPAK88 is power density. Many aspects, like size and current, make it ideal when dealing with applications with limited space. However, as circuits shrink, thermal performance becomes very important.
Quick size comparison
The illustration below provides a quick comparison of package sizes, showing how the LFPAK88 is significantly smaller than both D²PAK and D²PAK-7. Clearly this reduction in size is a huge benefit when meeting the challenges of circuit miniaturization. However when shrinking down any circuit, thermal performance becomes ever more important. So how do these packages compare thermally?
Putting up little resistance
Rth(j-mb) represents a device’s thermal resistance between junction and mounting base, and is measured in Kelvin/Watt (K/W). It is measured from the silicon chip inside the package to the bottom of the package where it mounts to the PCB. The Rth(j-mb) performance of the LFPAK88 and D²PAK packages can be seen in the graph below.
As can be seen the LFPAK88 delivers better performance. Its thermal resistance of 0.35 K/W is considerably lower than the 0.43 K/W of the two D²PAK variants. The reason for this improvement comes from the difference in the copper drain tabs, illustrated below. The LFPAK88 has a much thinner drain tab compared to that of the D²PAK – heat has to travel further through the D²PAK’s thicker tab, thus creating greater thermal resistance.
Another measurement of a device’s thermal resistance is given by Rth(j-a), i.e. taken between junction and ambient air. A larger package should have an inherent benefit over a smaller package for Rth(j-a) – a larger surface area offers greater heat dissipation. This seems to place the LFPAK88 at a disadvantage. However, while package size is a factor, Rth(j-a) is heavily influenced by external conditions such as PCB layout. So applying necessary cooling strategies with optimization techniques and the right layout design will level the playing field.
Cooling off strategies
In order to better understand the difference the PCB layout can make regarding Rth(j-a), we performed two simulations comparing the D²PAK and LFPAK88. Simulation 1 used minimum footprint for both D²PAK and LFPAK88, i.e. copper only under the package. In the second simulation, a 1 inch² footprint, vias and ground plane were used. Both simulations were carried out to a JEDEC standard.
Results from the simulations are reproduced below. They confirm that the LFPAK88’s Rth(j-a) performance can compete with that of the D²PAK, given the right conditions. Only when minimum PCB footprint – which is neither realistic nor recommended – is used for both devices, then the larger device has a better junction to ambient performance. However, by increasing copper area and/or using a PCB with ground plane – which is part of any PCB design – then the much smaller package is very similar in thermal performance.
Making full use of LFPAK88’s power density benefits
The LFPAK88 was designed to give the best performance overall when looking at size, current and thermals. The latter attribute certainly being supported by the device’s very good Rth(j-mb) performance – its thinner leadframe giving it a distinct advantage over the larger D²PAK package. What’s more, it can deliver a Rth(j-a) performance comparable to its bigger rivals by incorporating standard cooling techniques.
Also, another feature (discussed in a previous blog) is the clip bond, which gives the device excellent current uniformity and better SOA performance than wire bond technology. By taking these factors into account, designers can make full use of the LFPAK88’s power density benefits.