Is today’s accepted MOSFET Figure of Merit still relevant?

We are all accustomed to looking at the Figure of Merit for MOSFETs as a product of RDS(on) and Qg. However, with gate drivers now capable of efficiently meeting large Qg requirements and faster switching topologies creating smaller more efficient systems, some often ignored parameters have now become ‘system critical’. So, is the traditional FoM definition still relevant?

From a conduction and switching performance perspective we are all accustomed to looking at the Figure of Merit (FOM) for MOSFETs as a product of the drain-source on resistance RDS(on) and the gate charge Qg.

FOM = RDS(on) x Qg

It was clearly a good indicator at the time of its definition, but most modern MOSFETs now have an optimized Qg.  With the advent of newer gate drivers which have made driving large Qg values much easier and faster switching topologies in the constant pursuit of smaller and efficient systems, means we are seeing different parameters become ‘system critical’. So, by pursuing the traditional FOM some manufacturers are spending resources to further optimize an already good Qg at the potential expense of other critical parameters.

In early 2018 we talked about how reverse recovery charge Qrr is often overlooked and underappreciated, and touched on its impact on voltage spiking and efficiency. As the traditional FOM definition also often acts as a gating factor for MOSFET selection, for today’s motor drive and SMPS topologies we need to elaborate on how important Qrr is and how Qg is becoming ‘less’ critical. In fact for these applications we would go so far as to suggest we need to redefine the MOSFET’s FOM so that we can choose the right MOSFETs, from a wide range of options, for better efficiency but also from a design ease, voltage spiking and EMI signature perspective.

Time to look closely at MOSFET FOM and the role of Qg

Qg in its purest sense, helps define the switching times at any given gate drive current and gives a practical comparison of switching performance between MOSFETs. For example, theoretically a MOSFET with 50 nC being driven by a 1 A source and sink current, can be turned on in 50 ns and turned off in another 50 ns. So a MOSFET with a lower Qg can be turned on and off quicker for any given gate drive current, potentially reducing switching losses.

However, it is not quite as simple as that. Let’s take a 50 nC MOSFET switching a 48 V line. With a 5 A drive it can be turned off in 10 ns, but it will result in an enormous 48000 V/µs of dv/dt. Which is why almost every application uses an external gate resistor (Rg) to control dv/dt and its associated effects. And adjusting Rg during the design in stage has a great impact in achieving the required switching performance.

In older systems, the gate driving capacity of controllers was a limiting factor, especially in applications where the MOSFETs are paralleled. But the gate driving capacity of today’s controllers has increased significantly and in more complex topologies a simple external gate drive stage can easily provide sufficient source and sink currents to drive several hundreds of nC under most practical conditions.

Even in terms of power efficiency, from an overall system perspective the losses involved in charging and discharging a gate are usually only a small fraction of the system power rating. That makes them effectively negligible for most applications. So in practical terms, even a considerable Qg difference can have a minimal or even no effect on most applications. However, it is worth noting that this power is dissipated in the gate drive components (external Rg and gate driver) so appropriate thermal provisions need to be made when selecting these components.

The below shows what those losses look like in some real-life applications.

Application (Gate drive voltage = 12 V)

Number of MOSFETs

Power rating (W)

Typical Qg losses (mW) for MOSFETs with 50 nC of Qg

% of power rating

Fly-Back @ 60kHz

1

30

36

0.12%

3-phase BLDC @ 20 kHz

6

750

72

0.01%

LLC  @ 150 kHz

2

250

180

0.07%

 

The impact of Qrr in switching applications

The effects of Qrr come into play when the body diode of the MOSFET is allowed to conduct, which of course is common in synchronous rectification applications and particularly dominant during the continuous conduction mode of operation.

Qrr and shoot through - Synchronous buck topology
Qrr and shoot through - Synchronous buck topology

During dead time, both high-side and low-side FETs are turned off allowing the low-side body diode to conduct the freewheeling current. This results in stored charge (Qrr) which is removed in the form a momentary shoot through when the high-side FET turns on. The turn on speed of the high side FET, sets the di/dt of this recovery current.  Along with the recovery losses, this recovery current in combination with the circuit’s parasitic elements can result in a voltage spikes.

 

Qrr and shoot through - BLDC full-bridge topology
Qrr and shoot through - BLDC full-bridge topology

During stage 5 of a full-bridge conversion, the body diode of Q2 is reverse biased while it is still conducting current. This results in a recovery current that flows through Q1 and the body diode of Q2, which represents a shoot-through scenario until the body diode of Q2 is completely recovered. After the recovery instant, the parasitic inductance in the current path results in a voltage swing to try to maintain the current in the path. This voltage excursion coupled with the parasitic elements in the path results in ringing at the switch node, leading to EMI.

Qrr and shoot through - fly back and other SMPS topologies
Qrr and shoot through - fly back and other SMPS topologies

The effects of Qrr in fly back and other SMPS topologies, especially operating in continuous conduction mode are profound. Consider a fly back topology when the primary side MOSFET is off, energy is transferred from the primary to secondary side (current flow is shown by the blue arrow). However, just before the primary side is turned on at the start of the next cycle, the synchronous controller turns off the MOSFET to prevent a shoot through allowing the body diode to conduct for the remaining time period. When the primary side does turn on at the beginning of the next cycle, the secondary MOSFET conducts in the reverse direction until the store charge is recovered, resulting in a momentary shoot through.

Using Qrr for a new MOSFET FOM

Qrr related shoot through is a major source of failure in SMPS. In addition, Qrr related voltage spiking and dv/dt make snubber design complex and lossy, and also result in an unwanted EMI signature. The widespread nature of the effects of the Qrr means not only is it critical for efficiency, but an important parameter for ease of design and system reliability.

Given the undeniable impact the Qrr parameter has across the spectrum of switching applications, it is strongly recommended to include it into the equation when selecting a MOSFET. But given the impact Qrr has on the overall health of the system compared to the Qg, if you were to ignore one of these switching parameters, then it should not be Qrr.