Selecting ESD protection for USB4 data lines

The maximum data rate of USB4™ is 40 Gbps, utilizing all transmit (Tx) and receive (Rx) lines offered by the USB Type-C® cable. This means 20 Gbps for each differential line pair, corresponding to a signal fundamental frequency of 10 GHz for each differential line pair. While the RF performance of ESD protection devices is traditionally compared by looking at their electrical capacitances, this method reaches its limit at around 10 GHz. As the capacitance and inherent inductance of an ESD protection device are effectively forming a band-stop filter.

Structure of an ESD protection device effectively forms a stop-band filter

Looking into the structure of an ESD protection device, its parasitics can be split into the capacitance (main contribution comes from the protection diode), inductance (main contribution comes from the package bondwire) and resistance.

To emphasize the importance of the inductance of the protection device, Nexperia compared the measured insertion loss behaviour (solid line) of a wire-bonded ESD protection device to a calculated insertion loss curve (dashed line) of an ideal capacitance C of the same value @ 10 GHz as the measured device. The deviation at 10 GHz due to the wire-bond inductance is notable.

It is obvious that the capacitance alone does not describe the behaviour of the device at frequencies of 10 GHz and higher. The band-stop resonance frequency  of the protection device is clearly visible. For frequencies in the GHz range, S-Parameters should be used rather than capacitances to assess the RF suitability of ESD protection devices.

Comparison of the insertion loss of a calculated ideal inductance-free capacitance (dashed line) with the measured insertion loss of a wire-bonded device having the same capacitance at 10 GHz (solid line).
Comparison of the insertion loss of a calculated ideal inductance-free capacitance (dashed line) with the measured insertion loss of a wire-bonded device having the same capacitance at 10 GHz (solid line).
Nexperia’s SOD962-2 (DSN0603-2) is an example of a monolithic Silicon package optimized for low inductance. The narrow solder pads support system designs with low return loss.

As a consequence, the suitability of ESD protection devices for USB4 data rates should be rated through S-parameters, notably |S21|(insertion loss or αIL) and |S11| (return loss or αRL) to describe the additional attenuation and reflection of the signal due to the ESD protection device. It should be noted that S-parameters are measured on 50-Ohm single-ended systems (100 Ohms differential), since this is the standard for measurement equipment, while USB4 data lines typically have line impedances of 90-80 Ohms differential (45-40 Ohms single-ended).

How package design supports RF performance of ESD protection

Thus, an ESD protection device with a lower inductance will offer a better RF performance when compared to another device with the same capacitance but higher inductance. On top, a lower inductance to GND allows a faster reaction of the ESD protection device, resulting in a lower clamping for fast transients such as ESD pulses. For both reasons, bondwire-less monolithic Silicon packages are preferred for ESD protection of very fast data lines. A package with narrow solder pads supports system designs with low return-loss.

Insertion loss and return loss budgets for USB3.2 and USB4 systems

An overview over Host/Device insertion loss budgets can be seen below for orientation. The host/device budget for USB4 Gen 2 (10 Gbps) is smaller compared to USB4 Gen 3 (20 Gbps) to allow a larger budget for longer cables up to 2m.

 

Host / Device budget

frequency

USB3.2 Gen2 (10 Gbps)

8.5 dB

5 GHz

USB4 Gen 2 (10 Gbps)

5.5 dB

5 GHz

USB4 Gen 3 (20 Gbps)

7.5 dB

10 GHz

 

While it might look desirable to choose an ESD protection device having insertion loss  and return loss as small as possible – and Nexperia can offer down to -0.19 dB insertion loss and -23.5 dB return loss @ 10 GHz, if required – there is a balance between RF- and clamping-performance: Improving RF performance in the same technology will reduce the clamping performance. It will also reduce the robustness of the ESD protection device but for high data-rate transceiver ICs, we have experienced that this transceiver IC is typically damaged due to the remaining clamping before the ESD protection device is damaged due to ESD overstress.

Nexperia have just released a new product family optimized for very fast data lines, offering these RF performances:

 

αIL @ 10 GHz,
50 Ohms SE (dB)

αRL @ 10 GHz,
50 Ohms SE (dB)

  PESD5V0R1BBSF  

-0.19

-23.5

  PESD5V0R1BCSF

-0.25

-19.4

  PESD5V0R1BDSF

-0.28

-19.0

 

Placing ESD protection relative to the AC coupling capacitance

Another important choice is the placement of the ESD protection device. USB 3.2 introduced an optional AC coupling capacitance in front of the Rx inputs, which became mandatory for USB4TM.  This leaves the option to place the ESD protection device either, between connector and AC coupling capacitance directly behind the connector (position 1) or between AC coupling capacitance and transceiver (position 2).

Two ESD protection placement options in relation to USB4 Rx AC-coupling capacitances
Two ESD protection placement options in relation to USB4 Rx AC-coupling capacitances

From the perspective of system-level ESD protection, position 1 is clearly preferred for two reasons. Firstly, the AC coupling capacitor will be protected against ESD transients as well. Secondly, it is advisable to have as much of the line inductance as possible between ESD protection device and transceiver IC for most efficient ESD protection. As a rule-of-thumb, 10 mm of additional trace mean roughly 3-3.5 nH inductance.  To visualize this effect, we compare two ElectroMagnetic Interference (EMI) scanner measurements, where an USB3 board with two ESD protection footprints was used to compare the efficiency of the same ESD protection devices in these two positions. It is obvious that the protection position right behind the connector is reducing the field strength at the transceiver IC notably.

Comparing the emitted EMI of two boards using an EMI scanner
Comparing the emitted EMI of two boards using an EMI scanner

The signal pins are excited by TLP pulses while the EMI field strength is recorded in two dimensions. The left board has the ESD protection mounted half-way between connector and transceiver IC, while the board on the right has the ESD protection mounted in the preferred position directly behind the connector. This is reducing the EMI field strength in the system and specifically at the transceiver IC significantly.

The placement of the ESD protection device has a direct impact on the required voltage rating of the protection device. The USB Type-C® connector allows to connect devices using the older USB3.x standard, which allows up to 2.8 V. In case the ESD protection device is in position 1, right behind the connector, the ESD protection devices used in position 1 should have a VRWM voltage rating > 2.8 V, as we have discussed in an earlier whitepaper.

Summing up, USB4 is the next step on the roadmap to increase the data transfer speed for the most ubiquitous interface. ESD protection devices support these data rates with low insertion loss and return loss values. A low inductance of the protection device is becoming as important as a low capacitance in the 10 GHz range. The best system-level ESD performance is achieved when mounting a protection device right behind the connector to use the inherent signal line inductance to one’s advantage and to protect the AC coupling capacitance. In this position, the VRWM voltage rating of the protection device needs to be > 2.8 V, since USB Type-C® allows to connect USB3.x interfaces to an USB4TM interface, where the specification allows up to 2.8 V.